https://koha.ing.unlp.edu.ar/logo-sii.jpg
Imagen de Google Jackets

Design and Analysis of Spiral Inductors [libro electrónico] / by Genemala Haobijam, Roy Paily Palathinkal.

Por: Colaborador(es): Tipo de material: TextoTextoDetalles de publicación: New Delhi : Springer India : Imprint: Springer, 2014.Descripción: xiv, 107 p. : ilTipo de contenido:
  • text
Tipo de medio:
  • computer
Tipo de soporte:
  • online resource
ISBN:
  • 9788132215158
Tema(s): Formatos físicos adicionales: Printed edition:: Sin títuloClasificación LoC:
  • TK7800-8360
  • TK7874-7874.9
Recursos en línea:
Contenidos:
Introduction -- Optimization of Spiral Inductor with Bounding of Layout Parameters -- Multilayer Pyramidal Symmetric Inductor -- Implementation of the MPS in Voltage Controlled Oscillator -- References -- Index.
Resumen: The book addresses the critical challenges faced by the ever-expanding wireless communication market and the increasing frequency of operation due to continuous innovation of high performance integrated passive devices. The challenges like low quality factor, design complexity, manufacturability, processing cost, etc., are studied with examples and specifics. Silicon on-chip inductor was first reported in 1990 by Nguyen and Meyer in a 0.8 μm silicon bipolar complementary metal oxide semiconductor technology (BiCMOS). Since then, there has been an enormous progress in the research on the performance trends, design and optimization, modeling, quality factor enhancement techniques, etc., of spiral inductors and significant results are reported in literature for various applications. This book introduces an efficient method of determining the optimized layout of on chip spiral inductor. The important fundamental tradeoffs of the design like quality factor and area, quality factor and inductance, quality factor and operating frequency, maximum quality factor and the peak frequency is also explored. The authors proposed an algorithm for accurate design and optimization of spiral inductors using a 3D electromagnetic simulator with minimum number of inductor structure simulations and thereby reducing its long computation time. A new multilayer pyramidal symmetric inductor structure is also proposed in this book. Being multilevel, the proposed inductor achieves high inductance to area ratio and hence occupies smaller silicon area.
Tipo de ítem: Libro electrónico Lista(s) en las que aparece este ítem: Ebooks
Valoración
    Valoración media: 0.0 (0 votos)
No hay ítems correspondientes a este registro

Introduction -- Optimization of Spiral Inductor with Bounding of Layout Parameters -- Multilayer Pyramidal Symmetric Inductor -- Implementation of the MPS in Voltage Controlled Oscillator -- References -- Index.

The book addresses the critical challenges faced by the ever-expanding wireless communication market and the increasing frequency of operation due to continuous innovation of high performance integrated passive devices. The challenges like low quality factor, design complexity, manufacturability, processing cost, etc., are studied with examples and specifics. Silicon on-chip inductor was first reported in 1990 by Nguyen and Meyer in a 0.8 μm silicon bipolar complementary metal oxide semiconductor technology (BiCMOS). Since then, there has been an enormous progress in the research on the performance trends, design and optimization, modeling, quality factor enhancement techniques, etc., of spiral inductors and significant results are reported in literature for various applications. This book introduces an efficient method of determining the optimized layout of on chip spiral inductor. The important fundamental tradeoffs of the design like quality factor and area, quality factor and inductance, quality factor and operating frequency, maximum quality factor and the peak frequency is also explored. The authors proposed an algorithm for accurate design and optimization of spiral inductors using a 3D electromagnetic simulator with minimum number of inductor structure simulations and thereby reducing its long computation time. A new multilayer pyramidal symmetric inductor structure is also proposed in this book. Being multilevel, the proposed inductor achieves high inductance to area ratio and hence occupies smaller silicon area.

No hay comentarios en este titulo.

para colocar un comentario.
BIBLIOTECA CENTRAL
    Calle 115 y 47 - (CP1900) La Plata
    Tel: (0221) 423-6689  int 118 -
    Email: bibcentral@ing.unlp.edu.ar
    Horario de atención: Lunes a Viernes de 8 a 19 hs..
    +54 2215900419

Con tecnología Koha